Display sourcev1: coherent architecture, state/inventory/test contracts; full research remains active with precise material/interface blockers
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Bounded research/review evidence. This artifact does not certify physical manufacturing closure or later changed routes.
Display panel — comprehensive research draft, version 1
Part · source-checked draft · full research remains active and critically blocked. This record specifies a coherent rigid-glass, normal-polarity, top-emitting RGB AMOLED panel with a hybrid LTPO backplane and a separately prefritted glass lid. It replaces the earlier unsupported rigid/TFE combination as the selected architectural proposal. It resolves the substrate/FPC/driver allocation and installed-mask omissions identified in amended reports R06–R08. It does not certify a complete material recipe, a calibrated workshop or a qualified panel. The molecular recipe and its paired drive envelope are real blockers below; making children being unbuilt is a different issue.
Required output and interfaces
One accepted panel serves one handset. The delegated Smartphone owner adopted the following project design requirements, subject to independent review; these are neither measurements of our hardware nor undocumented Samsung test conditions.
| Attribute | Required project value or contract |
|---|---|
| Logical image / active rectangle | 1080 × 2340, 6.2-inch full-rectangle diagonal; derived 65.993 × 142.985 mm, 61.105 µm pixel pitch |
| Refresh | 1, 60 and 120 Hz, with stable held image and independently measured transitions |
| Package | At most 76 × 156 × 2.5 mm, including DDIC and flex fold; no OLED camera hole; top bezel camera |
| Input | Four 2.5 Gb/s D-PHY data lanes plus clock; 10-bit/component RGB carried by DSC 1.2 at 10 compressed bits/pixel; two horizontal 540-pixel slices, 20 rows/slice |
| Supply | 5.0 V ±5%, at most 2 A; physical internal rail generation and losses included in panel/driver budget |
| Peak white | At least 2600 cd/m² using the CTS 1.2 8%-center-white/2%-APL-background peak arrangement and documented timing; not a 10% peak test |
| Sustained white | At least 600 cd/m² full-screen D65 at 120 Hz for 30 min at 25°C ambient |
| Color | 100% sRGB and at least 95% P3-D65 coverage; mean ΔE2000 at most 3. Coverage intersection/patch calculation must be bound to the final protocol |
| Power / thermal | At most 4 W during sustained white and 8 W during peak; operating panel surface at most 45°C at 25°C ambient |
| Service life | Direct LT95 at least 3000 h at initial 200 cd/m² full-screen D65, 60 Hz, 25°C; dedicated samples; no unvalidated acceleration conversion |
| Final optical integration | Selected polarizer above lid; touch sensor, cover glass and their optical adhesive are separate consumers |
Geometry and bandwidth are arithmetic, not performance evidence: 2,527,200 logical pixels; a three-subpixel RGB-stripe candidate has 7,581,600 subpixels. Compressed active payload is 3.03264 Gb/s at 120 Hz; uncompressed RGB101010 would be 9.09792 Gb/s. Packet/blanking/PPS settings, pixel-bank/mask CAD, source analog rails and guardbands still need the paired component contract. A clock/lane count or generic DDIC is insufficient. MIPI DSI scope describes the protocol boundary, while its complete specification is member-access.
Selected architecture and alternatives
The public LG/Yonsei work reports a fabricated 6-inch QHD LTPO panel operating at 1–120 Hz using a 6T2C compensation scheme. This supports choosing hybrid LTPS driving/switching devices plus oxide retention devices, rather than assuming the current all-oxide inventory meets the adopted retention/current duty. The paper is evidence for that architecture, not our transistor process, layout, rails or molecular stack. Kim et al. 2023.
Choose normal-polarity top emission: reflective anode, compatible injection/transport/blocking films, separately patterned RGB emissive regions, electron-side layers, semitransparent cathode and optical cap. The glass lid remains above this optical cavity. The simulated 2022 inverted/top-anode 6T1C circuit is a separate alternative; its polarity cannot be silently combined with this stack. Fan et al. 2022.
Choose one-cell glass-frit laser lid sealing. Samsung describes this rigid architecture; Corning's manufacturer-authored process uses a separately prefired lid and supports lead-crossing seals. Public glass-seal examples supply a starting bismuth-borate-zinc/filler/absorber formulation family and a diode-laser route. Actual expansion, absorption, glass, passivation and leads must be tested together; example conditions are not adopted operating settings. The two nominal 0.55 mm example plates and thin seam show no geometric impossibility within 2.5 mm, but do not prove our finished thickness. Samsung rigid sealing, Corning/DOE process, glass-seal disclosure.
TFE remains a separately inventoried alternative. It adds low-temperature inorganic/organic deposition and its own pinhole/edge/barrier compatibility work; no source shows it impossible on rigid glass. Polymer edge sealing is another alternative with different ingress/desiccant obligations. Neither is mixed into the glass-frit recipe. LCD, coarse passive OLED, inverted OLED and silicon micro-OLED are distinct architectures; changing to one does not demonstrate the adopted AMOLED baseline. Samsung TFE.
Immediate physical making route
- Qualify the process substrate and form the bare LTPO array. The same single glass receives LTPS/oxide devices, gates/source/drain, dielectrics, storage capacitors, interconnect/GOA, planarization and pixel banks. Physical silicon/oxide charges, compatible deposition/lithography/etch/activation equipment, pattern masters, source gases, power, cooling and actual cleaning/replacement stock are explicit. Independently test array contacts, leakage, compensation/current response, retention and drawn aperture/lead geometry using an earlier powered stimulus fixture. Final DDIC and flex are not incorporated yet.
- Deposit the selected normal-polarity RGB OLED system on that array. Qualify named organic/electrode/capping source charges and witness samples; prepare source crucibles/liners/shields and calibrated independent rate/composition/thickness monitors. Retain actual vacuum, dry inert transfer, clean environment, source heating/power, cooling and loading hardware. Install separate RGB FMM patterns, common-layer/open masks and actual mask carrier/tension/alignment tooling. Exchange or clean masks through a protected path. Lost evaporant, residue, cleaning charge and worn source stock are separated from incorporated films.
- Prepare the second lid independently, then seal. Wash/form a compatible lid, deposit frit paste and remove its vehicle/prefire it before touching the organic panel. Protected transport brings it to the OLED-coated intermediate. Hold, align and laser-fuse the matched edge while monitoring the actual thermal behavior at electrode-present and absent regions. Laser containment/interlocks, exhaust, calibration and heat removal are hardware requirements. The single-cell proposal does not import Samsung's motherglass temporary outer UV seal as an unexplained mandatory ingredient. Sealing over leads changes heat coupling and cannot be accepted using a bare-glass trial alone. Lead-crossing control disclosure.
- Connect the module once and protect it. Bond the actual driver chip/set to glass and the one final flex to glass using independently grade-matched COG/FOG ACF and local heat/pressure/optical alignment. Add physical supply/rail circuitry, strain relief and the selected circular polarizer. The final driver must decode the actual DSC/PPS link and generate the chosen compensation/data/gate/emission signals. It is neither a generic bench controller nor bare flexible copper. Dexerials COG/FOG and OLED grade examples support the joining method, not automatic catalog tolerance transfer.
- Accept the finished panel independently. Verify connected electrical behavior, actual optical/color/temporal output, all-rail power and surface temperature, package leakage and direct service-life samples. Keep final-phone optical bonding and touch/controller installation at their real parent. No lit coupon, nominal mask, microscope image or qualitative leak observation accepts this output.
Inventory, quantities and moving state
The machine-readable immediate inventories and full-record proposal are in physical-proposal-fullmetadata-v1.json. Specific new capability requests are in new-identity-and-capability-requests-v1.json. They expose, rather than hide, the following groups:
| Group | Actual incorporated / consumed / reused requirements |
|---|---|
| Bare array | One qualified process glass; LTPS and oxide/dielectric/metal charges; planarization/bank charge; resist/developer; actual lithographic masters, deposition/etch/crystallization tools and witness structures |
| OLED coating | Named separated organic feeds; reflective anode and semitransparent cathode source charges; optical cap; three color-specific reusable FMM designs plus common-layer masks; carrier/tension hardware |
| Encapsulation | One separate prefritted glass lid; lid-joining fixture, localized laser sealer and actual beam/stage/feedback/power/thermal/exhaust interfaces; matched edge and lead-crossing witnesses |
| Final module | The one sealed intermediate; actual DDIC/DSC/gate-source drivers, one final flex, physical rail module, grade-specific ACF/strain-relief stock and one polarizer laminate |
| Operation stock | Initial versus recurring source/crucible/liner/shield/QCM-crystal/seal/trap service stock, substrate/mask/bond cleaning and compatible wipes/rinses, mask replacement and separately captured losses |
| Environment/handling | Qualified clean/dry room, vacuum and dry inert gas/purge supply; real carriers, protected transfer/storage, surfaces, supports, source loading, cooling/water, power, protection, ventilation and chemistry-segregated receivers |
| Control/diagnosis | Earlier physical host, process controller/I/O/actuators, clock, program loader, cables and supply; source/stage/laser logs and powered test contacts; black-box programs available before fabrication |
| Independent acceptance | Spectral/angular/pixel fixture; calibrated film monitor with independent witness method; whole-package barrier/aging fixture; DSI/DSC/analog stimulus fixture; synchronous all-rail power and surface thermal fixture; actual coupon/blank/defect/reference stock |
The state ledger carries one substrate through S0 glass → S1 bare LTPO → S2 OLED-coated array → S3 lid-sealed bare panel → S4 connected accepted module. The second lid is L0. Parent substrate/backplane/OLED/barrier references are intermediate lineage, not extra incorporated copies. Driver/FPC incorporation moves to S4; all manufacturing reachability is retained through the actual consuming stage. The older bottom-emission electrode-film and TFE routes remain separate nonselected records with original provenance.
One final accepted panel is required. Trial, destructive/barrier, calibration, aging and rejected panels are separate counts; they are not assumed to be one or assigned an invented yield. Each charge is ledgered as deposited mass + source/chamber/mask retention + witness use + rejected stock + recovery/loss. Recording these variables prevents double consumption; it does not supply unmeasured numbers. The explicit state/quantity ledger is intermediate-state-and-quantity-ledger-v1.json.
Mask making versus installed tooling
A mask-writing apparatus is not the installed mask. Samsung's RGB method needs different aligned FMMs for R, G and B. The selected proposal therefore retains the three designs, embodied pattern/fiducial geometry, physical frame/carrier, common-layer exclusions, cleaning and replacement inventory. DNP documents photolithography/etching of finished metal masks; research demonstrates a distinct electroforming alternative. Neither proves our full-area registration, sag/tension, mask gap or thermal tolerance. Samsung masks, DNP production, Kyoto electroforming.
NMP-based mask cleaning is a selected candidate, not universal qualification: residue-specific removal, narrow frame gaps, solvent retention and geometry damage must be checked. The primary cleaning study used an Alq3/FMM-mimic system; it does not qualify every organic feed or mask. Cleaning study.
Calibration and acceptance contract
- Geometry: independently referenced active area/pixel/lead/mask fiducials, drawn bank clearance and total registration/shadow/thermal error budget. Final mask/pixel CAD is still required; nominal pitch is not an aperture or overlay specification.
- Electrical: golden independently decoded DSC vectors, four-lane electrical/timing tests, power sequencing, contact resistance/shorts, analog current response, compensation and 1/60/120 Hz retention/flicker. Actual DDIC/pad/rail/PPS contract remains paired to the material choice. Provided test programs are black boxes; physical host/loading/stimulus/reference paths are prerequisites.
- Photometry/color: independent calibrated spectral radiance and wavelength/stray/linearity/polarization correction; spatial aperture and angular motion matched to actual pixels and measurement patches. Source/detector references must exist independently of the panel being accepted. A microscope or named thermal/photon reference is insufficient. NIST calibration, luminance realization.
- Thickness/composition: multiple source rate monitors cross-checked against independent deposited witness thickness/n-k/composition; a QCM frequency alone does not prove actual growing OLED thickness or dopant ratio.
- Barrier/life: matched whole packages with real leads, calibrated blank and known-defect/leak references, calcium ingress witnesses and direct controlled environmental/powered aging. Helium leak and planar WVTR are different tests. ASTM F1249's flexible-film demonstrated range cannot simply accept a glass package or a much smaller OLED moisture budget. Historical Corning/DOE results are useful capability evidence, not an adopted acceleration factor. ASTM scope, Corning/DOE.
- Reporting: bind meter uncertainty, duty/pattern, ambient and surface temperature, sensor field/integration, image mode, powered rails and repeatability to each pass/fail threshold. SID IDMS supplies method/reporting concepts, not performance limits. Public CTS 1.2 separates peak, sustained and color patterns. Full normative conformity is not claimed: registration-only complete texts were not retrieved. SID IDMS, VESA criteria, official pattern implementation.
Genuine critical blockers after investigated alternatives
B01 — exact RGB material/optical recipe and service-life envelope. The selected *architecture* is fixed, but no checked completely specified public RGB recipe is yet matched to the project gamut/peak/power/LT95 requirements. This is not evidence that it is impossible. Jeon2021 supplies a concrete top-blue candidate but its supplement leaves NDP-series p-dopant/CPL identity incomplete; TableS6's headline multi-thousand-hour figures are converted LT50 at100nit, not directly measured projectLT95. Its named transport/emitter/microcavity system is not a free choice of unrelated layers. Paper, supplement, pp8–9/30.
The investigated AnDBO/DMPPP bi-EML alternative also cannot be adopted from its headline: the2025 primary paper measures375hLT95 at3000nit and converts2709h at1000nit usingn=1.8; its long-life branch has different color from its undoped deep-blue branch, and the high-PLQY dopant is not identified there. The two branch advantages are not AND ingredients. SID P194.
Idemitsu's top-emission dual-blue/dual-HTL approach is another credible alternative, but material codes BH/BD/HTL and current-density lifetime conditions do not supply a complete independently synthesizable charge contract or project full-white life. The public silicon RGB communication stack was rejected as a direct substitute because its thermal/current/lifetime regime and pixel array are different. Idemitsu primary paper, RGB communication experiment.
B02 — paired layout/driver/rail contract. Final RGB aperture/fill factor and mask allowance depend on a laid-out LTPO circuit and qualified emission/current system. Required DSC/PPS/blanking, data/gate/emission/reset waveforms, source DAC/current/rail and COG/FOG pad contracts must be fixed together. Existing oxide stock, generic meter or undefined driver set does not resolve this. The public LTPO panel evidence justifies the architecture; it is not our full chip/layout drawing.
B03 — actual-duty numerical material/reference acceptance. Complete component property, process-window and uncertainty limits (purity, outgassing, thickness/source ratio, glass/frit/lead thermal stress, cleaning compatibility, mask total error and true water/oxygen ingress) depend on B01/B02 and independently referenced representative trials. The appropriate instruments may remain unmade children, but the missing *immediate* grade/interface/reference limits prevent complete specification/inventory approval. Direct tests are declared rather than replaced by generic microscopes, headline life or unqualified references.
A chemistry specialist should select a fully public matched charge recipe or isolate the exact private identity/experimental measurement needed; electrical/metrology owns the paired drive/test fixture capabilities. This draft has completed the resolved architecture, flow, hardware/control, stock allocation and test-duty work, but the own-node full research assignment is still active and blocked on these critical choices. No complete/green flag is requested. Re-review the next version after those conditions are resolved; source-checked architecture is not final material qualification.
Provenance and staged integration
Original source53/review84 evidence-draft files and hashes remain untouched; prior-amended-artifact-hashes.json preserves them. Null/unlinked inherited sources remain inherited provenance, never newly checked evidence. The v1 report's new checked sources and narrow limits are in sources.json; no full commercial or confidential recipe was inferred. The physical proposal retains complete prior metadata, old routes and a full intermediate/requirement allocation ledger; it must rebase/check selected-route guards before the central gate. Publication of this source-checked draft preserves activity and independent-review distinctions, and cannot approve engineering flags.