Display panel

Consumer-specific numerical targets, quantities and acceptance limits remain open or incompletely reviewed. No smartphone-grade suitability is claimed. Distinct capability tiers require their own making route and qualification.

These records expose known requirements and alternative or blocked hypotheses. They add no manufacturing links or selected discovery depth.

Assemble selected rigid-glass active-matrix OLED panel

Assemble selected rigid-glass active-matrix OLED panel

• Display substrate · part
• LTPO transistor backplane · part
• OLED-coated backplane · part
• Display encapsulated intermediate · part
• Flexible interconnect · part
• Display making equipment · tool
• Optical instruments · tool
• Electrical instruments · tool

Inventory is a hypothesis; handling, waste, protection, calibration, quantities, losses and suitability are not completely identified.

These are research questions, not published manufacturing dependencies. The seed combines alternatives, operating requirements and verification relationships.

Display making equipment, Flexible interconnect, Chip fabrication equipment, Chip packaging equipment, Chip test equipment, Design tools

{
  "function": "Connect one rigid-lid-sealed RGB LTPO intermediate to its final COG driver, FOG flex and physical power interface, add conventional polarizer, then independently test the whole module.",
  "quantity": "One physical intermediate per attempted panel plus separately ledgered commissioning, reject, destructive, calibration and aging stock; final module count1.",
  "consumer_panel_contract": {
    "diagonal_mm": 157.48,
    "active_width_mm": 65.9932817866759,
    "active_height_mm": 142.9854438711311,
    "pixels": [
      1080,
      2340
    ],
    "logical_pixels": 2527200,
    "RGB_stripe_subpixels": 7581600,
    "pixel_pitch_um": 61.104890543218424,
    "RGB_stripe_horizontal_cell_um": 20.368296847739476,
    "refresh_modes_Hz": [
      1,
      60,
      120
    ],
    "RGB888_active_payload_bits_per_s": 7278336000,
    "source_lane_design": "4×2.5Gb/s candidate; timing/overhead/range not yet final",
    "module_budget_mm": [
      76,
      156,
      2.5
    ],
    "hole": "none; top-bezel camera",
    "touch": "separate laminated capacitive panel",
    "HDR_input": "10bpc RGB input; DSC1.2 at10bits/pixel (3:1), two540-pixel slices of20rows; fourD-PHY2.5Gb/sdata lanes",
    "DSC_slices": {
      "horizontal": 2,
      "width_px": 540,
      "height_rows": 20,
      "vertical_groups": 117
    },
    "compressed_active_payload_bits_per_s": 3032640000,
    "PHY": "fourD-PHY2.5Gb/sdata lanes plus differentialclock;actualPPS/timing/pinassignmentpendingcentralcontract",
    "peak": "Project2600cd/m2 at CTS1.2 8% center white plus2%APL background; explicitly no Samsung measurement transfer",
    "sustained": "Project >=600cd/m2 full-screen D65 for30min at25C and120Hz",
    "color": "Project100%sRGB and>=95%P3-D65 area coverage, meanDeltaE2000<=3; intersection coverage and exact patches proposed",
    "power": "Project panel and driver<=4W full-screen600nit120Hz,<=8W transient peak",
    "temperature": "Project panel operating surface<=45C at25C ambient",
    "lifetime": "Project LT95>=3000h at200nit full-screenD65,60Hz,25C, directly measured dedicated stock, no unsupported acceleration",
    "supply_interface": "Project 5.0V +/-5%, maximum2A; all internal rail generation is physical panel module hardware and included in4W/8W budgets"
  },
  "critical_immediate_blocks": [
    "B01: Fully named matched RGB transport/emitter/electrode/capping recipe and exact life/gamut/power grade unresolved after checked alternatives.",
    "B02: Actual paired LTPO pixel/bank/mask CAD, DSC/PPS/driver rails/pads and compensation timing contract remain unresolved.",
    "B03: Scope-specific material/process windows and independent calibration guardbands require B01/B02 and representative trials."
  ],
  "independent_acceptance": "Actual spectral/angular/DSC/film/package/all-rail thermal tests with independent references; no generic microscope/meter equivalence."
}

• 2026-10-08 materials discovery proposal; original record retained where reused
• Section05 sourcev1; original source53/review84 evidence preserved, architecture correction not full research completion.